Example Image´ó·¢28

ÔÚÕâÀï¸æËßÎÒÃÇÄúµÄÐèÇó°É

ÎÒÃÇ¿ÉÒÔ¸ü¿ìµÄÏàʶÄúµÄÐèÇó
ÆóÒµÈ˲ÅÕÐÆ¸ÐèÇó·´Ïì

È˲ÅÐèÇó


ÁªÏµÈË&ÁªÏµ·½·¨


ÔÚÕâÀï¸æËßÎÒÃÇÄúµÄÐèÇó°É

ÎÒÃÇ¿ÉÒÔ¸ü¿ìµÄÏàʶÄúµÄÐèÇó
ÆóÒµÍÅÅà±íµ¥
´ó·¢28¡¤(ÖйúÓÎ)¹Ù·½ÍøÕ¾

Ò»ÎÄ¿´¶®FPGAµÄËÞÊÀ½ñÉú

FPGAµÄ¶¨Î»
Âß¼­Æ÷¼þ£¨Êý×ÖоƬ£©¿ÉÒÔ´óÖ·ÖΪ±ê×¼Æ÷¼þºÍ¶¨ÖÆÐ¾Æ¬Á½Àà¡£¡£¡£Ò»Ñùƽ³£À´Ëµ£¬£¬£¬Ô½Æ«Ïò¶¨ÖÆ£¬£¬£¬Âß¼­Æ÷¼þµÄÐÔÄÜ£¨ËÙÂÊ£©¡¢¼¯³É¶È£¨ÃÅÊý£©ºÍÉè¼Æ×ÔÓɶȵȷ½Ãæ¾ÍÔ½ÓÐÓÅÊÆ£¬£¬£¬µ«Ïà¶ÔµØ£¬£¬£¬Éè¼Æ¡¢ÖÆÔìÏà¹ØµÄ¿ª·¢Óöȣ¨Non-Recurring Engineering£¬£¬£¬NRE ±¾Ç®£©Ò²½ÏΪ¸ß°º£¬£¬£¬ÇÒ´Óϵ¥µ½³ö»õµÄÖÜתʱ¼ä£¨Turn Around Time£¬£¬£¬TAT)»á¸ü³¤¡£¡£¡£

´ó·¢28¡¤(ÖйúÓÎ)¹Ù·½ÍøÕ¾

¶¨ÖÆÐ¾Æ¬Ò²´óÖ·ÖΪÁ½ÖÖ£º´Ó»ù´¡µ¥Î»£¨cell£©×îÏÈÉè¼ÆµÄÈ«¶¨ÖÆÐ¾Æ¬ºÍʹÓþ­ÓÉÓÅ»¯µÄ±ê×¼µ¥Î»ÊµÏÖµÄ°ë¶¨ÖÆÐ¾Æ¬¡£¡£¡£°ë¶¨ÖÆÐ¾Æ¬°üÀ¨ÁËʹÓñê×¼µ¥Î»¿â¾ÙÐÐÉè¼ÆµÄ±ê×¼µ¥Î»ASIC£¨cell-based ASIC£©£»£»£»£»£»ÔÚÔ¤ÏȰڷźñê×¼µ¥Î»£¨²¼ÏßǰµÄ¹¤ÒÕËùÓÐÍê³É£©µÄ¾§Ô²ÉÏͨ¹ý¶¨ÖƲ¼ÏßÐγɲúÆ·µÄÃÅÕóÁУ¨gate array£©£»£»£»£»£»½éÓÚ±ê×¼µ¥Î»ASICºÍÃÅÕóÁÐÖ®¼äµÄǶÈëʽÕóÁУ¨embedded array£©£»£»£»£»£»Í¨¹ýÔÚÃÅÕóÁÐÉÏÌṩSRAM¡¢Ê±ÖÓPLLµÈͨÓÃÄ£¿£¿£¿£¿éÀ´½«¶¨ÖƱ¾Ç®×îС»¯µÄ½á¹¹»¯ASIC£¨structured ASIC£©£¬£¬£¬µÈµÈ¡£¡£¡£ÕâЩ¹¤ÒÕ¶¼ÊÇΪÁ˽µµÍ¶¨ÖÆÐ¾Æ¬µÄNRE±¾Ç®ºÍËõ¶ÌTATʱ¼ä¡£¡£¡£
ÁíÒ»·½Ã棬£¬£¬±ê×¼Æ÷¼þÖÐÓÐÒ»ÀàÂß¼­Æ÷¼þ±»³ÆÎª¿É±à³ÌÂß¼­Æ÷¼þ£¨Programmable Logic Device£¬£¬£¬PLD£©£¬£¬£¬Ëü²î±ðÓÚÃæÏòÀο¿ÓÃ;ÇÒÎÞ·¨¶¨ÖƵÄASSP£¬£¬£¬ÊÇÒ»Àà¿Éͨ¹ý±à³ÌÀ´ÊµÏÖÖÖÖÖÂß¼­µç·µÄÂß¼­Æ÷¼þ¡£¡£¡£PLDÕâÖÖ¡°¿ÉÒÔ±à³ÌµÄÂß¼­µç·¡±ÓÉÓÚ¾ßÓÐÔÊÐíÓû§Í¨¹ý±à³ÌÊÖ¶Î×ÔÓÉʵÏÖ¶¨ÖƵç·µÈÌØÉ«£¬£¬£¬½üЩÄêÈ¡µÃÁ˺ܴóµÄÉú³¤¡£¡£¡£
FPGAÊÇPLDµÄÒ»ÖÖ£¬£¬£¬Ëüͨ¹ý×éºÏʹÓÃÆ÷¼þÄÚ´ó×ÚÂß¼­¿éÀ´ÊµÏÖÓû§ËùÐèµç·¡£¡£¡£FPGA±ÈÒÔÍù£¨ÏÁÒ壩µÄPLDÉè¼Æ×ÔÓɶȸü¸ß£¬£¬£¬²¢ÓнüËÆÓÚÃÅÕóÁеĽṹ£¬£¬£¬Òò´Ë±»ÃüÃûΪFPGA¡£¡£¡£FPGAÁ¿²úʱ²»¾ßÓÐÈκÎÂß¼­¹¦Ð§£¨Î´±à³Ì״̬£©£¬£¬£¬´Ó°ëµ¼Ìå³§É̵ĽǶÈÀ´¿´£¬£¬£¬ËüÊÇÒ»ÖÖ¿ÉÁ¿²úµÄ±ê×¼Æ÷¼þ£¬£¬£¬´ÓÓû§µÄ½Ç¶ÈÀ´¿´£¬£¬£¬ËüÊÇÒ»ÖÖ²»ÐèÒª¿ªÄ£µÈ¸ß¶îÓöȣ¨NRE±¾Ç®£©ÓÖ¿ÉÒÔËæÊ±ÊµÏÖ¶¨ÖƵç·µÄÀû±ãµÄASIC¡£¡£¡£

FPGAµÄÀúÊ·
FPGA/PLDÐÐÒµ¾­Óɼ¸Ê®ÄêµÄÉú³¤£¬£¬£¬ÒÑÓÐÁè¼Ý40¼ÒÆóÒµ¼ÓÈëÆäÖС£¡£¡£Æ¾Ö¤ÄêÔµÄ˳ÐòÀ´Ò»Æð»ØÊ×Ò»ÏÂFPGAµÄÆÕ¼°¡¢Éú³¤ºÍ±äǨµÄÀúÊ·¡£¡£¡£

01

20ÊÀ¼Í70ÄêÔ£¨·ºÆðFPLA¡¢PAL)ÔçÆÚµÄPLDʹÓúÍPROMÀàËÆµÄ½á¹¹ÊµÏֿɱà³ÌµÄAND-ORÕóÁУ¬£¬£¬¿ÉÒÔʹÓô洢Æ÷¼þÀ´Ó°Ïóµç·ÐÅÏ¢¡£¡£¡£1975ÄêSignetics(Î÷¸ñÄáµÙ¿Ë£©¹«Ë¾Ðû²¼ÁËÒ»ÖÖ»ùÓÚÈÛ¶ÏË¿µÄ¿É±à³ÌFPLA£¨Field ProgrammableLogic Array£¬£¬£¬ÏÖ³¡¿É±à³ÌÂß¼­ÕóÁУ©¡£¡£¡£ØÊºó1978ÄêMMI¹«Ë¾£¨ÏÖLattice¹«Ë¾£©½«FPLA¼ò»¯²¢½ÓÄÉË«¼«ÐÔ¾§Ìå¹ÜÖÆ³Ì£¬£¬£¬¿ª·¢Á˸ßËÙµÄPAL(Programmable Array Logic£¬£¬£¬¿É±à³ÌÕóÁÐÂß¼­£©¡£¡£¡£×îÖÕMMI¿ª·¢µÄPAL»ñµÃÁËÆÕ¼°¡£¡£¡£PAL½ÓÄÉÁËÑÓ³ÙСµÄÀο¿ORÕóÁк͸ßËÙµÄË«¼«ÐÔPROM,µ«ºÄµç½Ï´óÇÒÎÞ·¨ÖØÐ±à³Ì¡£¡£¡£

02

20ÊÀ¼Í80ÄêÔÂ20ÊÀ¼Í80ÄêÔÂǰÆÚ£¨·ºÆðGAL¡¢EPLD¡¢FPGA£©µ½ÁË20ÊÀ¼Í80ÄêÔ£¬£¬£¬¸÷¹«Ë¾¶¼×îÏÈÏúÊÛ»ùÓÚCMOS EPROM/EEPROMµÄPLD²úÆ·£¬£¬£¬ÕâЩ²úÆ·¹¦ºÄµÍÇÒ¿ÉÖØÐ±à³Ì¡£¡£¡£Õâ¸öʱÆÚÒÔDRAM¼¼ÊõΪ½¹µãµÄÈÕ±¾°ëµ¼Ìå³§ÉÌÉú³¤Ñ¸ËÙ£¬£¬£¬¶øÃÀ¹úµÄ´óÐͰ뵼Ì幫˾ҵ¼¨Ïà¶ÔµÍÃÔ¡£¡£¡£´ËʱÏòµ¼PLDÊг¡µÄÖ÷ÒªÊÇÃÀ¹úµÄ´´ÒµÐÍÆóÒµ¡£¡£¡£Lattice¹«Ë¾£¨À³µÏ˼£¬£¬£¬1983Ä꽨É裩µÄGAL(Generic Array Logic,ͨÓÃÕóÁÐÂß¼­£©£¬£¬£¬Altera¹«Ë¾£¨°¢¶ûÌØÀ­£¬£¬£¬1983Ä꽨É裩µÄEPLD£¨Erasable PLD,¿É²Á³ýPLD)µÈÖÖÖÖ¸÷ÑùµÄPLD¼Ü¹¹Ó¿ÏÖ£¬£¬£¬ÆäÖÐGAL»ñµÃÁËÆÕ±éÓ¦Óᣡ£¡£GAL»ùÓÚºÍPAL¼æÈݵÄÀο¿ORÕóÁнṹ£¬£¬£¬²¢ÇÒ½ÓÄÉÁËCMOS EEPROM×÷Ϊ±à³ÌµÄÓ°ÏóÔª¼þ¡£¡£¡£
GALºÍÇ°Ãæ½éÉܵÄFPLA¡¢PALµÈ¼òµ¥AND-ORÕóÁнṹµÄPLD±»Í³³ÆÎªSPLD£¨Simple PLD£©£¬£¬£¬ËüÃǵɶÈÖ»ÓÐÊýÊ®µ½Êý°ÙÃŵÄˮƽ¡£¡£¡£¶øËæ×ÅLSI¼¯³É¶ÈÒ»Ö±Ôö¸ß£¬£¬£¬ÒªÖÆÔì±ÈGAL¸ü´ó¹æÄ£µÄPLDʱ£¬£¬£¬¼òµ¥AND-ORÕóÁнṹµÄ×ÊÔ´ÆÌÕÅÇéÐξÍÔ½À´Ô½ÑÏÖØÁË¡£¡£¡£Òò´Ë£¬£¬£¬×÷Ϊ½á¹¹Ô½·¢ÎÞаµÄ´ó¹æÄ£PLD£¬£¬£¬FPGAºÍCPLD·ºÆðÁË¡£¡£¡£
×îÔ罫FPGA²úÆ·»¯µÄXilinx¹«Ë¾£¨ÈüÁé˼£¬£¬£¬1984Ä꽨É裩ÊÇÓÉ´ÓZilog£¨Æë¸ñÂ壩¹«Ë¾È¥Ö°µÄRoss H.Freeman ºÍ Bernard V.VonderschmittÁ½ÈËÅäºÏ¿ª°ìµÄ´´ÒµÐÍÆóÒµ¡£¡£¡£FreemanÔÚ1985ÄêÖÆ×÷Á˵Úһö¾ßÓÐÊÊÓüÛÖµµÄFPGAоƬ£¨XC2064ϵÁУ©£¬£¬£¬¸ÃоƬ½ÓÄÉÁË4ÊäÈË¡¢1Êä³öµÄLUTºÍFFÏà×éºÏµÄ»ù±¾Âß¼­µ¥Î»¡£¡£¡£ÉÔºó¼ÓÈëXilinxµÄWiliam S.Carter ÓÖ·¢Ã÷Á˸ü¸ßЧµÄµ¥Î»¼äÅþÁ¬ÒªÁì¡£¡£¡£ÕâÁ½Ð¡ÎÒ˽¼ÒµÄ·¢Ã÷»®·Ö±»³ÆÎªFreemanרÀûºÍCarterרÀû£¬£¬£¬ËüÃÇÊÇPLDÀúÊ·ÉÏ×îÎªÖøÃûµÄÁ½¸öרÀû¡£¡£¡£ÓÉÓÚ·¢Ã÷ÁËFPGA£¬£¬£¬Ross H.Freeman ÔÚ2009Äê±»ÁÐÈëÁËÃÀ¹ú·¢Ã÷¼ÒÃûÈËÌᣡ£¡£
Xilinx¹«Ë¾µÄFPGA²úÆ·£¨²úÆ·ÃûΪLCA£©¾ßÓÐÉè¼Æ×ÔÓɶȸߡ¢¿ÉÖØ±à³ÌºÍºÄµçµÍµÈÓÅÊÆ£¨ÓÉÓÚ½ÓÄÉÁËCMOS SRAM£©¡£¡£¡£Concurrent Logic¹«Ë¾Êܵ½Xilinx¹«Ë¾FPGAµÄÆô·¢£¬£¬£¬ÓÖÁ¬ÏµMIT(ÃÀ¹úÂéÊ¡Àí¹¤Ñ§Ôº£©µÄPetriÍøÂçÑо¿Ð§¹û£¬£¬£¬Éú²úÁËÖ§³Ö²¿·ÖÖØÉèÖõÄFPGA²úÆ·¡£¡£¡£Í¬Ê±£¬£¬£¬Ó¢¹ú°®¶¡±¤´óѧҲÔÚ1985Äê×îÏÈ×ÅÊÖ»ùÓÚFPGAµÄÐéÄâÅÌËã»úÑо¿£¬£¬£¬²¢ÓÚ1989Äêͨ¹ýAlgotronix¹«Ë¾£¨ÏÖXilinx¹«Ë¾£©²úÆ·»¯Á˲¿·ÖÖØÉèÖõÄFPGA²úÆ·¡£¡£¡£ÔÚÕâЩ²úÆ·ÖУ¬£¬£¬±»ÖÚÈËÊìÖªµÄ»®·ÖÊÇAtmelµÄAT6000ºÍXilinxµÄXC6200,ËüÃÇÊÇÏÖÔÚ¶¯Ì¬ÖØÉèÖÃFPGAµÄÊ¼×æ¡£¡£¡£
20ÊÀ¼Í80ÄêÔºóÆÚ£¨·ºÆð·´ÈÛË¿FPGAºÍCPLD£©µ½ÁË20ÊÀ¼Í80ÄêÔÂÖкóÆÚ£¬£¬£¬Ëæ×Ű뵼Ì弯³É¶ÈºÍËÙÂʵÄÌáÉý£¬£¬£¬·ºÆðÁËÎÞ·¨²ÁдµÄ·´ÈÛË¿FPGA¡£¡£¡£ÍƳö·´ÈÛË¿FPGA²úÆ·µÄ¹«Ë¾ÓÐActel£¨°®ÌØ£¬£¬£¬1985Ä꽨É裩¡¢QuickLogic(¿ì¼­°ëµ¼Ì壬£¬£¬1988Ä꽨É裩ºÍCrosspoint(1991Ä꽨É裩¡£¡£¡£
²»¹ý´Ëʱ£¬£¬£¬¸Õ½µÉú²»¾ÃµÄFPGA»¹²»¾ß±¸ÒµÄÚÓû§ËùÆÚ´ýµÄÐÔÄÜ£¬£¬£¬ÒÔÊÇÓв»ÉÙÆóÒµ»¹ÔÚ̽Ë÷»ùÓÚÆäËû½á¹¹µÄ´ó¹æÄ£PLD.Ò»¾­¿ª·¢¹ýAND-ORÕóÁÐPLD²úÆ·µÄAltera¡¢AMD(³¬Íþ°ëµ¼Ì壩¡¢LatticeµÈ¹«Ë¾¶¼ÔÚ¿ª·¢Óɶà¸öPLD¿é×éºÏ¶ø³ÉµÄ´ó¹æÄ£PLD²úÆ·£¬£¬£¬ÕâЩ²úÆ·ØÊºó±»Í³³ÆÎªCPLD(Complex PLD).ËäÈ»CPLDÔÚ¼¯³É¶ÈºÍÉè¼Æ×ÔÓɶÈÉÏȱ·¦FPGA,µ«ÓÉÓÚºÍͬÆÚµÄFPGAÏà±È¾ßÓÐËÙÂʿ졢²»Ò×ʧºÍ²ÁдÈÝÒ×£¨½ÓÄÉEPROM/EEPROM)µÈÓÅÊÆ£¬£¬£¬ÒÔÊÇÖ±µ½20ÊÀ¼Í90ÄêÔÂǰÆÚ£¬£¬£¬ËüÃǶ¼ºÍFPGAÒ»Ñù£¬£¬£¬ÊǾßÓдú±íÐԵĴó¹æÄ£PLD²úÆ·¡£¡£¡£¿ÉÊÇ£¬£¬£¬ÔÚ20ÊÀ¼Í90ÄêÔºóÆÚ£¬£¬£¬»ùÓÚSRAMµÄFPGA¼¼Êõ²»¹ÜÔÚ¼¯³É¶ÈÕÕ¾ÉËÙÂÊÉ϶¼»ñµÃÁË¿ìËÙÉú³¤£¬£¬£¬ÒÔÊÇÏÖÔÚCPLDµÄ¶¨Î»ÒѾ­Äð³ÉÁËÁ®¼ÛµÄС¹æÄ£PLD²úÆ·¡£¡£¡£Í¼Æ¬

20ÊÀ¼Í80ÄêÔµĴ´ÒµÇéÐÎ
ͼƬFPGAÊг¡Ò»Ö±ÊÇÓÉ´´ÒµÐÍÆóÒµÀ´Ö÷µ¼¼Ü¹¹Ñз¢ºÍ²úÆ·»¯µÄ¡£¡£¡£µÚÒ»¸ö½«FPGA²úÆ·»¯µÄXilinxÊÇ1984Ä꽨ÉèµÄ´´ÒµÐÍÆóÒµ¡£¡£¡£AlteraºÍLatticeÒ²ÔÚͬʱÆÚ½¨Éè²¢¿ª·¢SPLD²úÆ·£¬£¬£¬ËæºóÒ²¼ÓÈëÁËFPGAÁìÓò¡£¡£¡£ActelÒ²ÊÇ´´ÒµÐÍÆóÒµ£¬£¬£¬±ÈXilinxÉÔÍíÆð²½¡£¡£¡£ÕâËÄ¼ÒÆóÒµ¾­ÊºóÐøÉú³¤£¬£¬£¬³ÉΪÁËFPGAÊг¡ÖÐÖ÷ÒªµÄËÄ´ó³§ÉÌ¡£¡£¡£ÔÙ¼ÓÉÏÉÔºó½¨ÉèµÄQuickLogic£¬£¬£¬ÔÚ20ÊÀ¼Í80ÄêÔ´´ÒµµÄÕâÎå¼ÒÆóÒµÂ½Ðø³ÉΪÁËFPGAÊг¡µÄÏòµ¼Õß¡£¡£¡£ÔÚ´óÐÍÆóÒµÖУ¬£¬£¬¿ª·¢¶ÀÍÌFPGA¼Ü¹¹²¢ÊµÏÖ²úÆ·»¯µÄÖ»ÓÐAT&TºÍMotorola£¨Ä¦ÍÐÂÞÀ­£©¹«Ë¾£¬£¬£¬µ«AT&T×îÔçÊÇͨ¹ýXilinxÌṩµÄ¼¼Êõ¼ÓÈëFPGAÊг¡µÄ£¬£¬£¬Motorola×îÏÈÒ²ÊÇ»ñµÃÁËPilkington¹«Ë¾µÄÊÚȨ²Å¿ª·¢²úÆ·µÄ£¬£¬£¬ËûÃǶ¼²»ÊÇ´ÓÁã×îÏȵġ£¡£¡£±ðµÄ£¬£¬£¬µÂÖÝÒÇÆ÷¡¢ËÉϵçÆ÷¹¤Òµ£¨ÏÖËÉÏ£©Á½¼Ò¹«Ë¾ÓëActel¹«Ë¾ÏàÖú£¬£¬£¬Infineon(Ó¢·ÉÁ裩¡¢ROHM Semiconductor£¨ÂÞÄ·°ëµ¼Ì壩Á½¼Ò¹«Ë¾ÓëZycad¹«Ë¾ÏàÖú¼ÓÈë¹ýFPGAÊг¡£¬£¬£¬µ«ÏÖÔÚ¶¼Òѳ·³ö¡£¡£¡£Í¼Æ¬

ÈÕ±¾°ëµ¼Ìå³§É̼°´óÐͰ뵼Ìå³§É̵͝Ïò
ͼƬLattice¡¢Altera¡¢Xilinx¡¢ActelµÈ20ÊÀ¼Í80ÄêÔ½¨ÉèµÄPLD³§É̶¼ÊÇûÓÐÖÆÔì×°±¸µÄÎÞ¾§Ô²³§£¬£¬£¬ËûÃǶ¼Î¯ÍÐÆäʱCMOS¹¤ÒÕ¼¼Êõ¼±ËÙÉú³¤µÄÈÕ±¾°ëµ¼Ìå³§ÉÌÖÆÔìоƬ¡£¡£¡£ÀýÈ磬£¬£¬Xilinx ºÍLatticeίÍеÄÊǾ«¹¤°®ÆÕÉú£¬£¬£¬¶øAlteraίÍеÄÊÇÏÄÆÕ¡£¡£¡£ActelÔò²»µ«Î¯ÍÐÖÆÔ죬£¬£¬»¹ÓëµÂÖÝÒÇÆ÷¹«Ë¾ºÍËÉϵç×Ó¹¤ÒµÔÚÖÆÔì¡¢¼¼ÊõºÍÏúÊ۵ȷ½ÃæÖÜÈ«½áÃËÏàÖú¡£¡£¡£ÔÚ20ÊÀ¼Í90ÄêÔ£¬£¬£¬Ò²ÓÐÏñFlashFPGAµÄ³§ÉÌGateField ÓëROHM Semiconductor ÕâÑùÔÚÖÆÔì¡¢¼¼Êõ¡¢ÏúÊ۵ȷ½ÃæÆÕ±éÏàÖúµÄ°¸Àý¡£¡£¡£²»¹ý½üЩÄ꣬£¬£¬PLDÖÆÔìµÄÖ÷Á¦¶¼·×·××ªÒÆµ½ÁËÁªµç£¨UMC)¡¢Ì¨»ýµç£¨TSMC)µÈ¾ßÓÐÏȽøCMOS¹¤ÒÕ¼¼ÊõµÄÖйų́Íå³§ÉÌ¡£¡£¡£
ÆäʱµÄÈÕ±¾´óÐͳ§ÉÌֻרעÓÚͨÓòúÆ·ÖеÄDRAMºÍ¿É¶¨ÖƲúÆ·ÖеÄÃÅÕóÁУ¬£¬£¬Òò´Ë²¢Ã»Óе¥¶À¼ÓÈë¹ýPLDÊг¡¡£¡£¡£
¶øµÂÖÝÒÇÆ÷¡¢ÃÀ¹ú¹ú¼Ò°ëµ¼Ì幫˾µÈÉÆÓÚÖÆÔìÂß¼­Ð¾Æ¬ºÍÄÚ´æ²úÆ·µÄÃÀ¹ú´óÐͰ뵼Ìå³§ÉÌ£¬£¬£¬Ò²¶¼Ò»¾­¼ÓÈë¹ýË«¼«ÐÔAND-ORÕóÁÐPLDºÍCMOS EPROM/EEPROM PLDµÈ²úÆ·µÄ¿ª·¢¡£¡£¡£Ö»ÊÇÔÚÑз¢Ð¼ܹ¹¡¢Ïòµ¼µÄÊг¡·½ÃæÈ±·¦×¨ÒµµÄPLD³§ÉÌÆð¾¢£¬£¬£¬ÏÖÔÚ´ó¶¼¶¼Òѳ·³öPLDÊг¡¡£¡£¡£´óÐÍÆóÒµAMD¹«Ë¾ÔÚ1987Äêͨ¹ýÊÕ¹ºMMIÒ²Æð¾¢¼ÓÈë¹ýмܹ¹CPLDµÄ¿ª·¢£¬£¬£¬µ«ØÊºóΪÁËרעÓÚÉú³¤ÊÆÍ·½ÏºÃµÄCPUÁìÓò£¬£¬£¬ÓÚ1996Ä꽫PLDÓªÒµ°þÀë²¢×ªÒÆµ½ÁË×Ó¹«Ë¾Vantis£¬£¬£¬×îÖÕÓÚ1999Äê³öÊÛ¸øÁËLattice¡£¡£¡£

03

20ÊÀ¼Í90ÄêÔ£¨1£©FPGA´ó¹æÄ£»£»£»£»£»¯Éú³¤20ÊÀ¼Í90ÄêÔ£¬£¬£¬XilinxºÍAltera»®·Ö¸ÄÁ¼¡¢À©Õ¹¸÷×ÔµÄXC400ºÍFLEX¼Ü¹¹£¬£¬£¬Ê¹FPGAÉÏÂß¼­µç·µÄ¹æÄ££¨ÃÅÊý£©»ñµÃÁË¿ìËÙÔöÌí¡£¡£¡£20ÊÀ¼Í90ÄêÔÂǰÆÚµÖ´ïÁËÊýǧÖÁÊýÍòÃÅ£¬£¬£¬20ÊÀ¼Í90ÄêÔºóÆÚ¸üÊÇÉú³¤µ½ÁËÊýÍòÖÁÊýÊ®ÍòÃŵĹæÄ£¡£¡£¡£Ê¹ÓöàöFPGAµÄ¿ìËÙÔ­ÐÍ¿ª·¢ÇéÐÎÒ²ÔÚ´Ëʱ·ºÆðÁË¡£¡£¡£½øÈë20ÊÀ¼Í90ÄêԺ󣬣¬£¬FPGAѸËÙÆÕ¼°£¬£¬£¬AT&T£¨PLDÓªÒµÏÖÊôLattice£©¡¢Motorola£¨ÏÖ³·³öÁËPLDÓªÒµ£©¡¢Vantis£¨ÏÖLattice£©µÈÔ½À´Ô½¶àµÄ³§ÉÌ×îÏÈÖÆÔì»ùÓÚSRAMµÄFPGA¡£¡£¡£´¨ÆéÖÆÌú¡¢NTT¡¢¶«Ö¥µÈÈÕ±¾³§ÉÌÒ²×ÅÊÖÑз¢¹ý²úÆ·£¬£¬£¬µ«×îÖÕ¶¼Ã»ÄÜÍÆÏòÊг¡¡£¡£¡£
Ìý˵ÓÉÓÚ¿ª·¢»ùÓÚSRAMµÄFPGA¿ÉÄÜ»áÇÖÕ¼XilinxµÄ»ù±¾×¨Àû£¨FreemanרÀûºÍCarterרÀû£©£¬£¬£¬Òò´ËÐí¶à³§ÉÌ×îÖÕ¶¼·ÅÆúÁ˲úÆ·»¯¡£¡£¡£1993ÄêAltera¾ÍÒòÆäÏúÊ۵ĻùÓÚSRAMµÄPLD²úÆ·£¨FLEXϵÁеȣ©µÄרÀûÎÊÌ⣬£¬£¬ºÍXilinxÖ®¼äÓйý³¤Ê±¼äµÄÖ´·¨¾À·×¡£¡£¡£×îÖÕÁ½¼Ò¹«Ë¾ÓÚ2001ÄêÏ¢Õù£¬£¬£¬ÒÔºóAlteraÒ²×îÏȳÆ×Ô¼ºµÄ²úƷΪFPGA¡£¡£¡£
20ÊÀ¼Í90ÄêÔºóÆÚ£¬£¬£¬ÉÐÓÐһЩÐÂÐ͵ÄFPGA²úÆ·ÃæÊÀ¡£¡£¡£ÀýÈ磬£¬£¬GateFiled¹«Ë¾µÄFPGAʹÓÃFlash Memory×÷Ϊ±à³ÌÔª¼þ£¬£¬£¬¾ßÓпɲÁд¡¢·ÇÒ×ʧµÈÓŵ㡣¡£¡£»£»£»£»£ÉÐÓÐDynaChip¹«Ë¾¿ª·¢µÄFPGA½ÓÄÉÁËBiCMOS¹¤ÒյĸßËÙECLÂß¼­µÈ¡£¡£¡£
20ÊÀ¼Í90ÄêÔºóÆÚ×îÏÈ£¬£¬£¬FPGAµÄ¼¯³É¶ÈºÍËÙÂÊ»ñµÃÁË¿ìËÙÉú³¤£¬£¬£¬ÌØÊâÊÇÔÚ¼¯³É¶ÈÉÏÓëCPLDÀ­¿ªÁ˾àÀë¡£¡£¡£ÓÉ´Ë£¬£¬£¬FPGA³ÉΪÁË´ó¹æÄ£PLDµÄ´ú±í¡£¡£¡£ÁíÒ»·½Ã棬£¬£¬FPGAÔÚÐÔÄÜÉϺÍÃÅÕóÁС¢±ê×¼µ¥Î»ASICµÈ°ë¶¨ÖƲúÆ·µÄ²î±ðÒ²Öð½¥ËõС£¬£¬£¬ÀֳɽøÈëÁË°ë¶¨ÖÆ²úÆ·£¨ÌØÊâÊÇÃÅÕóÁУ©µÄÊг¡¡£¡£¡£
Õû¸ö20ÊÀ¼Í90ÄêÔ£¬£¬£¬FPGAµÄϵͳ»¯ºÍ´ó¹æÄ£»£»£»£»£»¯Ç÷ÊÆºÜÊÇÏÔ×Å£¬£¬£¬Òò´Ë´îÔØMPUºÍDSPµÈÓ²ºËÄ£¿£¿£¿£¿éÒ²³ÉΪÁËÒ»¶¨Ç÷ÊÆ¡£¡£¡£1995Ä꣬£¬£¬Altera¹«Ë¾µÄFLEX10K×îÏÈͨ¹ý´îÔØ´æ´¢Æ÷¿é£¨memory block)À´À©´ó²úÆ·µÄÓ¦ÓùæÄ££¬£¬£¬Í¬Ê±»¹´îÔØÁËPLL(Phase-Locked Loop,ËøÏà»·£©ÒÔÔöǿʱÖÓ¹ÜÀíºÍ¸ßËÙµç·Éè¼ÆÄÜÁ¦¡£¡£¡£´ÓÕâ¸öʱÆÚ×îÏÈ£¬£¬£¬FPGAÕæÕý³ÉΪ±»ÆÕ±éÓ¦ÓõÄÁ¿²úϵͳ£¬£¬£¬»ñµÃÁË¿ìËÙµÄÆÕ¼°¡£¡£¡£1997Ä꣬£¬£¬Âß¼­¹æÄ£µÖ´ïÁË25ÍòÃÅ£¬£¬£¬Ö÷ƵҲµÖ´ïÁË50~100 MHz.µ½ÁË1999Ä꣬£¬£¬Xilinx¹«Ë¾ÐÂÐÍFPGA Virtex-EºÍAltera¹«Ë¾APEX20KµÄÐû²¼Ôö½øÁËFPGA½øÒ»²½µÄ´ó¹æÄ£»£»£»£»£»¯ºÍ¸ßËÙ»¯£¬£¬£¬½«¼¯³É¶ÈÌá¸ßµ½ÁË100ÍòÃż¶±ð£¬£¬£¬Õâ±ê¼Ç×ÅFPGAÕýʽӭÀ´Á˰ÙÍòÃÅʱ´ú¡£¡£¡£
£¨2£©20ÊÀ¼Í90ÄêÔµĴ´ÒµÇéÐÎ20ÊÀ¼Í90ÄêÔÂǰ°ëÆÚ¼ÓÈëFPGAÊг¡µÄ´´ÒµÆóÒµÓÐCrosspoint¹«Ë¾¡¢DynaChip¹«Ë¾£¨Dyna Logic)ºÍZycad¹«Ë¾¡£¡£¡£ZycadÔ­±¾Ö÷Òª¿ª·¢Âß¼­·ÂÕæEDA¹¤¾ß£¬£¬£¬µ«ØÊºó³öÊÛÁËEDAÓªÒµ²¢×¨×¢ÓÚFPGAÊг¡£¬£¬£¬Òò´ËÒ²¿É±»ÒÔΪÊÇÕâһʱÆÚµÄ´´ÒµÆóÒµ¡£¡£¡£È»¶ø´Ëʱ£¬£¬£¬ÏÈÐеÄXilinx¡¢Altera¡¢Actel ºÍ Quicklogic ÒѾ­»ýÖüÁ˺ÜÇ¿µÄʵÁ¦ÄÑÒÔÓâÔ½£¬£¬£¬µ¼ÖÂCrosspoint ºÍDynaChip¶¼ÖÐ;Í˳öÁËÊг¡¡£¡£¡£
Crospoint¹«Ë¾½¨ÉèÓÚ1991Ä꣬£¬£¬ÊÇ×îºóÒ»¼ÒÉú²ú·´ÈÛË¿FPGAµÄÆóÒµ¡£¡£¡£¸Ã¹«Ë¾ÔÚ1991Äê¾ÍÉêÇëÁËרÀû£¬£¬£¬²úÆ·Ò²ÉÏÊÐÁË£¬£¬£¬µ«×îÖÕÕÕ¾ÉÔÚ1996ÄêÖÕÖ¹ÁËÓªÒµ¡£¡£¡£ËäÈ»Æä½¨Éè²»µ½Ò»Äê¾Íͨ¹ý¹É¶«ÈÕ±¾ASCII¹«Ë¾ÓëÈÕ±¾°ëµ¼Ìå´ó³§£¨ÈÕÁ¢ÖÆ×÷Ëù£©µÞ½áÁ˼¼Êõ¿ª·¢ºÍÖÆÔìÏúÊÛµÄÌõÔ¼£¬£¬£¬Í¬Ê±ÓÖºÍÆäËûÖÁ¹«Ë¾½áÃ˲¢Öƶ©Á˼ÓÈëFPGAÊг¡µÄÍýÏ룬£¬£¬µ«¸ÃÍýÏëÈ´ÒòÖÖÖÖÔµ¹ÊÔ­ÓÉÎÞ¼²¶øÖÕ¡£¡£¡£CrosspointµÄFPGA,¼òÆÓ˵¾ÍÊÇÔÚ½ðÊô²¼Ïß²ã¼ä´©¿×°²ÅŷǾ§¹è·´ÈÛË¿£¬£¬£¬´Ó¶øÊµÏÖÓû§¿É¶¨ÖƵÄÃÅÕóÁС£¡£¡£ÆäÌØÉ«ÊǽÓÄÉÁË×îϸÁ£¶ÈµÄ¾§Ìå¹Ü¶Ô£¬£¬£¬¿ÉÒÔºÍÃÅÕóÁÐÒ»Ñù¾ÙÐо§Ìå¹Ü¼¶±ðµÄÅþÁ¬¡£¡£¡£ÈôÔÚ¾§Ìå¹Ü¼¶±ðºÍCMOSÂß¼­ÃŽṹһÖ£¬£¬£¬ÄÇôÀíÂÛÉϾͲ»»á±¬·¢ºÍFPGAÒ»ÑùµÄ¼¯³É¶ÈÉϵÄÈõµã¡£¡£¡£ÕâÒ»µãÕýÊÇCrosspointµÄÁ¢Òì¼¼Êõ£¬£¬£¬ÀàËÆµÄFPGA֮ǰûÓйý£¬£¬£¬Ö®ºóÒ²ÔÙû·ºÆð¹ý¿ÉÒÔʵÏÖºÍCMOSÃÅÕóÁÐÒ»Ñù¼Ü¹¹µÄ¿É±à³ÌÆ÷¼þ¡£¡£¡£
ÁíÒ»·½Ã棬£¬£¬20ÊÀ¼Í90ÄêÔºóÆÚ XilinxºÍAlteraÁ½¾ÞÍ·ÔÚÊг¡ÉÏÌåÏÖÇ¿¾¢£¬£¬£¬Ò»¶Îʱ¼äÄÚ¶¼Ã»ÓÐд´FPGAоƬ³§ÉÌ·ºÆð¡£¡£¡£ÒÔFPGAºË»ò¶¯Ì¬ÖØÉèÖô¦Öóͷ£Æ÷µÈÐÂÖÖ±ðÆðÉíµÄ³§ÉÌÈ´²»ÉÙ£¬£¬£¬ÓÈÆäÊǺóÕß¡£¡£¡£¿ÉÊÇÕâЩÆóÒµ´ó¶àҪô±»ÊÕ¹º¡¢ÒªÃ´µ¹±Õ£¬£¬£¬¼´±ãÖÁ½ñ»¹ÔÚ¼ÌÐøÄ±»®£¬£¬£¬Ò²ÏÕЩ¶¼Ã»ÓлñµÃÉÌÒµÉϵÄÀֳɡ£¡£¡£

04

21ÊÀ¼Í00ÄêÔ£¨1£©°ÙÍòÃÅʱ´úºÍϵͳLSI»¯½øÈë2000Ä꣬£¬£¬FPGA×îÏÈ·ºÆðϵͳLSI»¯µÄÇ÷ÊÆ¡£¡£¡£×÷ΪÓÉFPGA³§ÉÌ¿ª·¢²¢Ìṩ֧³ÖµÄ´¦Öóͷ£Æ÷IP£¬£¬£¬NiosÈíºË´¦Öóͷ£Æ÷±»Altera¹«Ë¾¹ûÈ»¡£¡£¡£Í¬Ä꣬£¬£¬Altera»¹ÍƳöÁËÊÀ½çÉϵÚÒ»¿î´øÓÐÓ²ºË´¦Öóͷ£Æ÷µÄFPGA²úÆ·Excalibur¡£¡£¡£ExcaliburÔÚһöоƬÉÏͬʱ¼¯³ÉÁËARM´¦Öóͷ£Æ÷£¨ARM922ºÍÍâÉ蹦Ч£©ºÍFPGAµç·¡£¡£¡£±ðµÄ£¬£¬£¬Xilinx¹«Ë¾Ò²ÍƳöÁËÈíºË´¦Öóͷ£Æ÷MicroBlaze,²¢Éú²úÁË´îÔØPowerPC´¦Öóͷ£Æ÷Ó²ºËµÄFPGA²úÆ·£¨Virtex II Pro£©¡£¡£¡£
ÔÚϵͳLSI»¯Àú³ÌÖУ¬£¬£¬¸ßËÙÍⲿ½Ó¿ÚÒ²Ò»ÑùÖ÷Òª¡£¡£¡£´ËʱFPGAÒ²×îÏÈÓ¦ÓÃSERDES£¨Serializer-Deserializer£¬£¬£¬´®ÐÐÆ÷£­½â´®Æ÷£©µç·ºÍLVDS£¨Low Voltage Differential Signaling,µÍµçѹ²î·ÖÐźţ©£¬£¬£¬ÊµÏÖÁ˸ßËÙ´®ÐÐͨѶ½Ó¿Ú¡£¡£¡£Í¬Ê±£¬£¬£¬ÎªÁËÓ¦¶ÔͼÏñ´¦Öóͷ£µÈÔËËãÐÔÄÜÉϵÄÐèÇ󣬣¬£¬ÔÚͨÓÃÂß¼­¿éÖ®Í⻹ÔöÌíÁËÊý×ÖÐźŴ¦Öóͷ£Æ÷¿é£¨DSP¿é£©ºÍ¾ßÓиßÃæ»ýЧÂʱȵĶàÊäÈëÂß¼­¿éµÈ¸ßÐÔÄÜÄ£¿£¿£¿£¿é£¬£¬£¬´Ó¶øÏÔÖøµØÌá¸ßÁ˼¯³É¶ÈºÍµç·ʵÏÖµÄÐÔÄÜ¡£¡£¡£È»ºó£¬£¬£¬ÎªÁËÓ¦¶Ô²î±ðÓû§¶ÔÓ²ºËIPµÄ²î±ðÐèÇ󣬣¬£¬³§ÉÌ»¹¿ª·¢Á˶àÖÖ×ÓϵÁвúÆ·¹©²î±ðÁìÓòÓû§Ñ¡Ôñ¡£¡£¡£
ÒÔAltera¹«Ë¾ÎªÀý£¬£¬£¬¸Ã¹«Ë¾ÍƳöÁËÜöÝÍÕâЩÁ¢ÒìÐÔ½ø»¯ÓÚÒ»ÉíµÄ¸ß¶ËFPGA²úÆ· Stratix(2002Ä꣬£¬£¬130nm),¸ÃϵÁкó¼Ì²úÆ·Stratix II£¨2004Ä꣬£¬£¬90nm)¡¢Stratix III(2006Ä꣬£¬£¬65nm)ºÍStratix IV(2008Ä꣬£¬£¬40nm£©Ã¿Á½ÄêÉý¼¶Ò»´Î¡£¡£¡£1995ÄêFLEX10KÐû²¼Ê±£¬£¬£¬ÆäÂß¼­µç·¹æÄ£Ô¼ÄªÊÇ10ÍòÃÅ£¬£¬£¬ÄÚ²¿Ê±ÖÓ×î´ó100 MHz.¶øµ½ÁË2009Ä꣬£¬£¬ÆäÂß¼­µç·¹æÄ£ÒѾ­µÖ´ïÁË1500ÍòÃÅ£¨840ÍòÃÅÂß¼­¼ÓDSP¿é£©£¬£¬£¬15Äê¼äÔöÌí150±¶£¬£¬£¬ÄÚ²¿×î´óʱÖÓÆµÂÊÒ²µÖ´ïÁË600 MHz.ÁíÒ»±ß£¬£¬£¬Xilinx¹«Ë¾µÄ¸ß¶ËFPGA²úÆ· Virtex II Pro£¨2002Ä꣬£¬£¬130 nm£©¡¢Virtex-4£¨2004Ä꣬£¬£¬90nm£©¡¢Virtex-5£¨2006Ä꣬£¬£¬65nm£©ºÍVirtex-6£¨2009Ä꣬£¬£¬40nm£©Ò²»òÐíÊÇÿÁ½ÄêÉý¼¶Ò»´Î¡£¡£¡£ÓÉÓÚÂß¼­Ð¾Æ¬µÄÖÆ³ÌԼĪÊÇÿÁ½Äê¸üÐÂÒ»´ú£¬£¬£¬ÒÔÊÇ2000ÄêÒÔºóFPGAµÄ½ø»¯»ù±¾ºÍÖÆ³ÌÉý¼¶ÊǼá³Öͬ²½µÄ¡£¡£¡£
£¨2£©21ÊÀ¼Í00ÄêÔµÄÐÂÐ˳§ÉÌFPGAÏà¹ØµÄÁ½¸ö×î»ù±¾µÄרÀûCarterרÀûºÍFreemanרÀû£¬£¬£¬ÔøÊÇ˼Á¿½øÈëFPGAоƬÊг¡µÄÐÂÐ˳§É̵Ä×î´óÕϰ­¡£¡£¡£²»¹ýËæ×Åʱ¼äµÄÍÆÒÆ£¬£¬£¬CarterרÀûºÍFreemanרÀû»®·ÖÔÚ2004ÄêºÍ2006ÄêÓ­À´×¨ÀûȨÏÞÆÚ½ìÂú¡£¡£¡£ÒÔ´ËΪÆõ»ú£¬£¬£¬¸ÃʱÆÚÓ¿ÏÖÁËÖÚ¶àFPGAÐÂÐËÆóÒµ£¬£¬£¬ÀýÈçSiliconBlue Technologies ¹«Ë¾¡¢Achronix Semiconductor¹«Ë¾¡¢Tabula¹«Ë¾¡¢Abound Logic¹«Ë¾£¨ÔøÎªM2000¹«Ë¾£©¡¢Tier Logic¹«Ë¾£¬£¬£¬µÈµÈ¡£¡£¡£
SiliconBlue ¹«Ë¾Õë¶ÔÖ÷Á÷FPGAÄܺĴóµÄȱÏÝ£¬£¬£¬»ùÓŲ́»ýµçµÄµÍйµç65nmÖÆ³Ì£¬£¬£¬¿ª·¢ÁËÃæÏò±ãЯʽװ±¸µÄ³¬µÍ¹¦ºÄFPGAϵÁвúÆ·iCE65¡£¡£¡£¸ÃϵÁÐÔÚ»ùÓÚSRAMµÄFPGAµÄ»ù´¡ÉÏͬʱ´îÔØÁË·ÇÒ×ʧÉèÖô洢Æ÷¼þ£¬£¬£¬ºÍÆäËûFPGAÏà±ÈÖ»ÓÐ1/7µÄÊÂÇ鹦ºÄºÍ1/1000µÄ´ý»ú¹¦ºÄ¡£¡£¡£
Achronix ¹«Ë¾Ôò»ùÓÚÃÀ¹ú¿µÄζû´óѧµÄ¸ßËÙFPGAÑо¿Ð§¹û£¬£¬£¬¿ª·¢ÁËSpeedster ϵÁС£¡£¡£Speedster FPGAµÄÌØµãÊǽÓÄÉÁËÒì²½µç·´«ÊäÊý¾ÝÁîÅÆ¡£¡£¡£Êý¾ÝÁîÅÆÊǽ«ÒÑÍùFPGAµÄÊý¾ÝºÍʱÖӺ϶þΪһ£¬£¬£¬Í¨¹ýÎÕÊÖ´«ÊäÊý¾Ý¡£¡£¡£¸Ã¹«Ë¾×î³õµÄ²úƷΪSPD60(̨»ýµç65nm£©£¬£¬£¬ÆäÍÌÍÂÁ¿±ÈÒÔÍùµÄFPGA´ó3±¶£¬£¬£¬Ô¼Îª1.5GHz¡£¡£¡£
Tabula ¹«Ë¾µÄ¼¼ÊõÌØÕ÷ÊÇʹÓö¯Ì¬ÖØÉèÖõÄר³¤£¬£¬£¬ÔÚͳһÂß¼­µ¥Î»ÉÏʵÏÖ¶àÖÖ¹¦Ð§´Ó¶ø½µµÍFPGA±¾Ç®¡£¡£¡£´ó³§µÄFPGAÏà¶ÔÆäËûASIC²úÆ·¼ÛÇ®½Ï¹ó£¬£¬£¬¶øTabulaÔÚ¼ÛÇ®ÉÏÕö¿ª¹¥ÊÆÕâÒ»µã½ÏÁ¿ºÏ´´ÒµÐÍÆóÒµµÄ×÷·ç¡£¡£¡£¸Ã³§É̵ÄABAXϵÁÐFPGA½ÓÄɶÀÍ̵Ķ¯Ì¬ÖØÉèÖü¼Êõ£¬£¬£¬¿ÉÒÔ¶¯Ì¬µØÇл»Âß¼­µ¥Î»£¬£¬£¬Òò´Ë¿ÉÓýÏÉÙµÄ×ÊԴʵÏÖ´ó¹æÄ£µç·¡£¡£¡£ÏêϸÀ´½²£¬£¬£¬¾ÍÊǽ«ÍⲿÊäÈëµÄʱÖÓÐźÅÔÚFPGAÄÚ²¿Í¨¹ý±¶ÆµÀ´ÌìÉú¸ßËÙʱÖÓ£¬£¬£¬²¢ÓøßËÙʱÖÓÐźÅÇý¶¯Âß¼­µç·ºÍµçÂ·ÖØÉèÖûú¹¹¡£¡£¡£Òò´Ë£¬£¬£¬¾ÍËãÎïÀíÉÏÂß¼­µç·µÄ¹æÄ£ÊÇÒ»¶¨µÄ£¬£¬£¬Ò²¿Éͨ¹ý¸ßËÙÇл»À´ÊµÏÖÂß¼­µç·µÄ·Öʱ¸´Ó㬣¬£¬´Ó¶ø»ñµÃ¸ü´óµÄÓÐÓÃÂß¼­¹æÄ£¡£¡£¡£Tabula½«ÕâÖÖÔÚ¶þάоƬÉÏÌí¼Óʱ¼äά¶ÈÀ´Ôö´óÓÐÓÃÂß¼­¹æÄ£µÄ½á¹¹³ÆÎªÈýάFPGA¡£¡£¡£
Abound Logic ¹«Ë¾Ðû²¼¹ýÒÔCrossbar Switch ºÍ¿ÉÀ©Õ¹¼Ü¹¹ÎªÌØÕ÷µÄ´ó¹æÄ£FPGA²úÆ·Rapter£¬£¬£¬µ«ÔÚ2010ÄêÖÕÖ¹ÁËÏà¹ØÓªÒµ¡£¡£¡£Tier Logic¹«Ë¾ÔòºÍ¶«Ö¥µÈ¹«Ë¾ÅäºÏ¿ª·¢ÁËÔÚCMOSµç·ÉÏ·½Í¨¹ý·Ç¾§¹èTFTµÄ·½·¨ÊµÏÖÉèÖÃSRAM,´Ó¶øÐÎ³ÉÆæÒìµÄµ¥Ìå3D-FPGAµÄ¼¼Êõ£¬£¬£¬µ«Ò²Í¬ÑùÔÚ2010ÄêÓÉÓÚ×ʽðǷȱÖÕÖ¹ÁËÓªÒµ¡£¡£¡£

05

21ÊÀ¼Í10ÄêÔ£¨1£©ÖƳ̵ÄÉú³¤ºÍ¼¼Êõг±Á÷2010Ä꣬£¬£¬Xilinx¹«Ë¾ºÍAltera¹«Ë¾¶¼Ðû²¼ÁË28nmµÄFPGA²¢ÓÚ2011Äê´º×îÏȹ©»õ£¬£¬£¬ÓÉ´ËÔ½·¢Àο¿ÁËFPGAÏà¶ÔASICµÄÓÅÊÆ¡£¡£¡£ÕâÁ½¼Ò×î´óµÄFPGA³§É̳ýÁËÒÔÍùµÄÆéá«¶ËFPGAÒÔÍ⣬£¬£¬¶¼ÓÖÔöÌíÁËÖж˲úÆ·Ïß¡£¡£¡£ÀýÈ磬£¬£¬Xilinx½«ÏàÖúµÄ¾§Ô²¹¤³§´ÓÁªµç»»³ÉÁĘ̈»ýµç£¬£¬£¬Xilinx7ϵÁÐÈ«Ïß²úÆ·£¨¸ß¶ËFPGA Virtex-7£¬£¬£¬ÖжËFPGA Kintex-7£¬£¬£¬µÍ¶ËFPGAArtix-7£©½ÓÄÉ28nmÖÆÔ칤ÒÕ£¬£¬£¬ÔÚÌá¸ßÐÔÄܵÄͬʱ½µµÍÁ˹¦ºÄ¡£¡£¡£ÏÖÔÚ£¬£¬£¬Xilinx ºÍ Altera Á½¼Ò¹«Ë¾×îеÄFPGA¶¼ÓĘ́»ýµç´ú¹¤Éú²ú¡£¡£¡£

½ÓÏÂÀ´£¬£¬£¬¶Ô28nm FPGAµÄ¼¼Êõг±Á÷¾ÙÐнâ˵


£¨a£©ÐÂʱ´úµÄSoC»¯³±Á÷ËäÈ» XilinxºÍAltera¶¼ÔøÔÚ2000Äê×óÓÒÐû²¼¹ýµÚÒ»´ú´îÔØÓ²ºË´¦Öóͷ£Æ÷µÄSoC»¯FPGA²úÆ·£¬£¬£¬µ«ÕâЩ²úÆ·¶¼½ÏÁ¿Ø²ÕÛ¡£¡£¡£ØÊºó£¬£¬£¬Ê¹ÓÃÈíºË´¦Öóͷ£Æ÷µÄFPGA»ñµÃÁËÆÕ±éµÄÓ¦Óᣡ£¡£²»¹ýËæ×ÅÖÆ³ÌµÄǰ½ø£¬£¬£¬´îÔØÓ²ºË´¦Öóͷ£Æ÷µÄFPGAÔÚÐÔÄܺͱ¾Ç®·½ÃæÒ²×îÏÈÖð²½Ó­ºÏÊг¡ÐèÇ󡣡£¡£±ðµÄ£¬£¬£¬ÕâһʱÆÚÕýÖµ32λ´¦Öóͷ£Æ÷Öð½¥±»Êг¡ïÔÌ­£¬£¬£¬ÔÚÕâЩÄÚÍâÒòËØµÄÍÆ¶¯Ï£¬£¬£¬½«ARMµÈÃæÏòǶÈëʽ´¦Öóͷ£Æ÷µÄCPUºË¡¢ÍâΧ´¦Öóͷ£µç·µÈ¹¦Ð§¼¯ÓÚÒ»ÉíÇÒÃæÏòSoCµÄFPGA×îÖÕ·ºÆðÁË¡£¡£¡£ÕâÀà²úÆ·±»³ÆÎªSoC FPGA¡¢¿É±à³ÌSoC»òSoPD£¨System on Programmable Device£©µÈ¡£¡£¡£ÀýÈ磬£¬£¬XilinxÒÔÈ«ÐÂµÄÆ·ÅÆÃûZynqÐû²¼ÁËZynq-7000ϵÁвúÆ·¡£¡£¡£¸ÃϵÁвúÆ·ÔÚÒÔARM Cortex-A9 MPCore ´¦Öóͷ£Æ÷Ϊ»ù´¡µÄSoCÖ®ÉÏ£¬£¬£¬¼¯³ÉÁËXilinx 28nmµÄ7ϵÁпɱà³ÌÂß¼­¡£¡£¡£¶øAlteraÍÆ³öµÄCyclone VϵÁÐ SoC FPGA²úÆ·£¬£¬£¬Ò²ÊÇÔÚͳһоƬÉϼ¯³ÉÁËË«ºË ARM Cortex-A9 MPCore´¦Öóͷ£Æ÷ºÍFPGA¡£¡£¡£
£¨b£©²¿·ÖÖØÉèÖò¿·ÖÖØÉèÖã¨partial reconfiguration)ÊÇÖ¸ÖØÐÂÉèÖÃFPGAµÄÌØ¶¨²¿·ÖʱÆäÓಿ·Ö¿ÉÒÔÒ»Á¬ÊÂÇé²»ÖÐÖ¹µÄ¹¦Ð§¡£¡£¡£Xilinx¹«Ë¾Virtex-4Ö®ºóµÄ¸ß¶ËFPGAÆ÷¼þ¼°Æä¿ª·¢¹¤¾ß£¨ISE 12ÒÔÉϵİ汾£©¶¼Ö§³Ö²¿·ÖÖØÉèÖᣡ£¡£Altera¹«Ë¾Ò²ÊÇ´ÓStratix V×îÏÈÖ§³Ö²¿·ÖÖØÉèÖᣡ£¡£´ÓÁ½´óFPGA³§ÉÌÏà¼ÌÕýʽ֧³Ö²¿·ÖÖØÉèÖü¼Êõ¿ÉÒÔ¿´³öÊг¡¶Ô¸Ã¼¼ÊõÓкܴóµÄÆÚ´ý¡£¡£¡£
£¨c£©3D-FPGA£¨2.5D-FPGA£©Xilinx¹«Ë¾Í¨¹ýÔÚ¹è»ù°å£¨silicon interposer)É϶ѵþ²¢ÅþÁ¬¶à¿é¶þÁлù±¾Î¬°Ú·ÅµÄFPGA£¬£¬£¬ÖÆÔìÁ˵Úһö2.5D-FPGA²úÆ·¡£¡£¡£ËäÈ»ÀíÏëµÄ3DоƬÊǽ«¶à¿é¾ßÓÐTSV(Through Silicon Via,¹èͨ¿×£©µÄоƬ±ÊÖ±µþ·Å½¨ÉèÌå½á¹¹£¬£¬£¬µ«ÓÐЩоƬÄÑÒÔÖÆ×÷TSV,ÇÒ°üÀ¨´ó×ÚTSVµÄоƬÁ¼Æ·ÂʵÍ£¬£¬£¬µ¼ÖÂÖÆÔ챾Ǯ¹ý¸ß¡£¡£¡£¶ø±¸ÊÜÖõÄ¿µÄ2.5D¼¼ÊõÖ»Ðè¶ÑµþÁ½²ãоƬ£¬£¬£¬ÎÞÐëʹÓÃTSV£¬£¬£¬Òò´Ë¿ÉÒÔ»º½âÕâЩÎÊÌâ²¢»ñµÃ¿¿½ü3DµÄÐÔÄÜ¡£¡£¡£»£»£»£»£»ùÓŲ́»ýµçµÄ28 nm HPLÖÆ³ÌÖÆÔìµÄVirtex-7 2000TÊǼ¯³ÉÁË68ÒÚ¸ö¾§Ìå¹ÜµÄÒµÄÚ×î´óFPGA,ËüµÄ200Íò¸öÂß¼­µ¥Î»Ï൱ÓÚ2000Íò¸öASICÃÅ¡£¡£¡£
£¨d£©³µÔØFPGAXilinx ¹«Ë¾»ùÓÚArtix-7 FPGA¿ª·¢ÁËÃæÏò³µÔØÓ¦Óá¢ÇкÏAEC-Q100±ê×¼µÄXA Artix-7 FPGA£¬£¬£¬ÒÔ¼°¿É±à³ÌSoCÐÎ̬µÄXA Zynq-7000²úÆ·¡£¡£¡£XilinxµÄÉè¼Æ¹¤¾ß»¹Í¨¹ýÁ˵ÚÈý·½ÊµÑéµÄ¹¦Ð§Çå¾²ÐÔ±ê×¼ISO-26262ÈÏÖ¤¡£¡£¡£±ðµÄAltera¹«Ë¾ºÍLattice¹«Ë¾Ò²¶¼ÔÚ×ö¸÷×ԵijµÔؽâ¾ö¼Æ»®¡£¡£¡£
£¨e£©CÓïÑÔ¿ª·¢ÇéÐÎ×î½ü£¬£¬£¬FPGA³§É̶¼×îÏÈÌṩʹÓÃCÓïÑÔ¾ÙÐÐFPGAÉè¼ÆµÄ¿ª·¢ÇéÐΡ£¡£¡£Xilinx¹«Ë¾µÄ¸ßÌõÀí×ۺϹ¤¾ßVivado HLSÖ§³ÖÓû§Ö±½Ó´ÓC¡¢C++»òSystem C´úÂë×ÛºÏÌìÉúFPGAÓ²¼þ¶øÎÞÐë±àдRTL£¬£¬£¬¸Ã¹¤¾ßͬʱ¼æÈÝISEºÍVivadoÉè¼ÆÇéÐΡ£¡£¡£ÁíÒ»±ß£¬£¬£¬Altera¹«Ë¾ÔòÆð¾¢ÍƽøOpenCLµÄÓ¦Óᣡ£¡£OpenCLÊÇ»ùÓÚCÓïÑÔ¾ÙÐпª·¢µÄ£¬£¬£¬²¢¿É½«´úÂë°²Åŵ½CPU¡¢GPU¡¢DSPÒÔ¼°FPGAµÈÖÖÖÖÆ½Ì¨¡£¡£¡£AlteraÏ£Íûͨ¹ýÌṩ¶ÔOpenCLµÄÖ§³Ö£¬£¬£¬ÔÚ²¢ÐÐÅÌËãµÄÓ²¼þ¼ÓËÙÆ÷Ó¦ÓÃÖÐÆÕ¼°×Ô¼ÒµÄFPGA²úÆ·¡£¡£¡£
£¨f£©ÆäËûÁíÍâÉÐÓÐһЩеļ¼Êõ¡£¡£¡£ºÃ±È£¬£¬£¬ÎªÁËÓ¦¶ÔͨѶ´ø¿íÐèÇóµÄÔöÌí¶ø´îÔØ¸ß´ø¿í¹âͨѶ½Ó¿ÚµÄ¹âFPGA£¨Optical FPGA£©»ò¿ÉÒÔÄÍÊÜÇ¿·øÉäµÄFPGA£¨Radiation-hardened FPGA£©µÈ¡£¡£¡£Í¼Æ¬

FPGAµÄÖÆ³ÌºÍõ辶ͼ
ͼƬÔÚ28nmÖÆ³ÌÖ®ºó£¬£¬£¬Xilinx¹«Ë¾ÍƳöÁË»ùÓÚ20nmÖÆ³ÌµÄUltraScaleϵÁС£¡£¡£¸ÃϵÁаüÀ¨Kintex UltraScale ºÍ Virtex UltraScaleÁ½¸ö×ÓϵÁУ¬£¬£¬ÆäÖÐVirtex UltraScaleµÄ¹æÄ£×î´ó£¬£¬£¬Ï൱ÓÚ5000ÍòASICÃÅ¡£¡£¡£UltraScaleϵÁлù±¾É϶¼ÊÇÓĘ́»ýµçµÄ20nmÖÆ³ÌÖÆÔìµÄ£¬£¬£¬Ö»ÓÐVirtex UltraScaleµÄ¸ß¶ËÐͺŽÓÄÉÁĘ̈»ýµçµÄ16 nm FinFET¹¤ÒÕ¡£¡£¡£ÁíÒ»±ß£¬£¬£¬×÷ΪAltera¹«Ë¾ÐÂÒ»´úGeneration 10 FPGAµÄArria 10 FPGAºÍStratix 10 FPGA£¬£¬£¬¶¼ÊÇ´îÔØÁËǶÈëʽӲºË´¦Öóͷ£Æ÷µÄSoC»¯²úÆ·¡£¡£¡£Generation 10Æ÷¼þʹÓÃÁËÒµÄÚ×îÏȽøµÄ Intel 15 nm FinFET¹¤ÒÕºĮ́»ýµçµÄ20 nm¹¤ÒÕÖÆÔ죬£¬£¬ÆäÖи߶˲úÆ· Stratix 10µÄÖ÷Ƶ¿ÉÒÔµÖ´ï1GHzÒÔÉÏ¡£¡£¡£
Âß¼­Ð¾Æ¬Ò»Ö±×·ËæÖƳ̹¤ÒÕµÄÉú³¤½Å²½Ã¿Á½Äê¸üÐÂÒ»´Î¡£¡£¡£±ÈÕÕIntel´¦Öóͷ£Æ÷µÄÉú³¤À´¿´£¬£¬£¬2000ÄêÖ®ºóµÄFPGAÒ²»ù±¾ÇкÏÕâÒ»Éú³¤½Ú×à¡£¡£¡£ASICÖ±µ½21ÊÀ¼Í³õÆÚ»¹½ô¸úÏȽø¹¤ÒյĽŲ½£¬£¬£¬µ«½ü10Ä꣬£¬£¬³ýÓÎÏ·Ö÷»úµÈÒ»²¿·ÖÓ¦ÓÃÍ⣬£¬£¬´ó´ó¶¼²úÆ·»¹ÔÚʹÓÃ130~90nmÖÆ³Ì£¬£¬£¬»ù±¾Í£ÁôÔÚÁË10ÄêǰµÄˮƽ¡£¡£¡£
FPGAÔòºÍͨÓô¦Öóͷ£Æ÷Ò»Ñù½ôËæ¹¤ÒÕµÄÉú³¤õè¾¶£¬£¬£¬Ò»Ö±Ê¹ÓÃ×îÏȽøµÄÖÆ³Ì¹¤ÒÕÍÆ³öвúÆ·¡£¡£¡£ÒԺ󣬣¬£¬Ëæ×Å28nm¡¢20nm¡¢16/14nmÖÆ³ÌµÄÍÆ½ø£¬£¬£¬FPGAËù½ÓÄɵŤÒÕÒª±ÈASICÁìÏÈÈýËÄ´ú£¬£¬£¬ÆäÐÔÄÜ×ãÒÔÆ¥µÐ130nm¡¢90nmÉõÖÁÊÇ65nmµÄASIC²úÆ·¡£¡£¡£Í¼Æ¬

¢¶Ï»¯ºÍÐÐÒµÏ´ÅÆ
ͼƬ½øÈë21ÊÀ¼Í10ÄêÔÂÖ®ºóFPGAÐÐÒµµÄ¢¶Ï»¯¼Ó¾ç¡£¡£¡£ÐÐÒµÄÚ×î´óµÄÁ½¼Ò³§ÉÌ XilinxºÍAlteraÕ¼ÓÐÁËÁè¼Ý°Ë³ÉµÄÊг¡·Ý¶î£¬£¬£¬¶ø½öÊ£µÄÁ½³ÉÖеĴ󲿷ÖÓÖ±»Öм᳧ÉÌLatticeºÍActelÅó·Ö¡£¡£¡£ÐÐÒµµÚËĵÄActelÓÚ2010Äê10Ô±»ÃÀ¹úÖ÷¹¥¸ß¿É¿¿ÐÔ°ëµ¼ÌåµÄMicrosemiÊÕ¹º£¬£¬£¬ÏÖÔÚÒÔMicrosemi FPGAÆ·ÅÆÍÆ³öµÄ²úÆ·Ö÷ÒªÊÇ»ùÓÚFlashºÍ·´ÈÛË¿µÄ·ÇÒ×ʧÐÔFPGA¡£¡£¡£
20ÊÀ¼Í80ÄêÔÂÆðÉíµÄFPGA³§ÉÌÖУ¬£¬£¬QuickLogicÒ²ÔøÏúÊÛ¹ý·´ÈÛ˿ʽFPGA,µ«ØÊºóÕâ¼Ò¹«Ë¾¸Ä±äÁ˲úÆ·²ßÂÔ²¢ÍÑÀëÁËFPGAÊг¡£¬£¬£¬Ö÷Óª¶¨ÖÆÇøÓò¿É±à³ÌµÄCSSP£¨Customer Specific Standard Products£¬£¬£¬¿Í»§Ìض¨±ê×¼²úÆ·£©²úÆ·¡£¡£¡£Ïà¹ØÓÚFPGAоƬÕûÌå¿É±à³ÌµÄ½á¹¹£¬£¬£¬CSSPÖ»Ìṩһ²¿·Ö¿É±à³ÌÁìÓò£¬£¬£¬¶øÊ£Óಿ·ÖʹÓÃͳһ½Ó¿ÚµÄ±ê×¼µç·£¬£¬£¬ÊÇÒ»ÖÖ¿Í»§¿ÉÒÔ¶¨ÖÆÖ¸¶¨²¿·ÖµÄ²úÆ·¡£¡£¡£AtmelµÄFPGA¼¼ÊõÔòÖ÷Òª×÷ΪǶÈëʽºËÓë×Ô¼ÒAVRµ¥Æ¬»ú×éºÏʹÓ㬣¬£¬¸Ã¹«Ë¾ºÍQuickLogicÒ»ÑùÍ˳öÁËÖ÷Á÷FPGAÊг¡¡£¡£¡£
21ÊÀ¼Í00ÄêÔÂÖÐÆÚÆðÉíµÄÐÂÐËFPGA³§ÉÌÖУ¬£¬£¬Ö÷´ò³¬µÍ¹¦ºÄFPGAµÄSiliconBlue ÓÚ2011ÄêÄêβ±»LatticeÊÕ¹º¡£¡£¡£LatticeØÊºóÍÆ³öÁË»ùÓÚ40nmµÄiCE40ϵÁвúÆ·¡£¡£¡£ÁíÍ⣬£¬£¬Ê¹Óö¯Ì¬ÖØÉèÖü¼ÊõÖ÷´òµÍ±¾Ç®FPGAµÄTabula¹«Ë¾ÔÚ2015Äê3Ôµ¹±Õ¡£¡£¡£Achronix¹«Ë¾ÔòÔÚ2015Ä껹»ùÓÚIntelµÄ22nmÖÆ³ÌÍÆ³öÁËSpeedster22i FPGAϵÁвúÆ·¡£¡£¡£
½ü¼¸Äê°ëµ¼ÌåÐÐÒµÕûÌå½øÈëÁË´óÏ´ÅÆÊ±´ú£¬£¬£¬Ïà¼Ì±¬·¢Á˶àÆð´óÐͲ¢¹º°¸¡£¡£¡£Óë´Ëͬʱ£¬£¬£¬FPGAÐÐÒµÒ²ÓÐËù¸Ä±ä¡£¡£¡£ÆäÖÐ×î¾ß´ú±íÐÔµÄÊÇIntel£¨Ó¢Ìضû£©¹«Ë¾ÓÚ2015Äê6ÔÂÊÕ¹ºÁËFPGA¾ÞÍ·Altera¡£¡£¡£×îÖÕÊÕ¹º½ð¶îΪ167ÒÚÃÀÔª£¬£¬£¬ÏÕЩÊÇAlteraÆäʱӪҵ¶îµÄ10±¶£¬£¬£¬ÕâÒ²ÊÇIntelÀúÊ·ÉÏ×î´óµÄÒ»±ÊÊÕ¹º¡£¡£¡£IntelÖ®ÒÔÊÇÖØ½ðÊÕ¹ºAltera£¬£¬£¬Ó¦¸ÃÊÇÊìϤµ½ÁËÒªÏë¼ÌÐøÔÚÒ»Ö±Éú³¤µÄÊý¾ÝÖÐÐĺÍIoT´¦Öóͷ£Æ÷Êг¡³Æ°Ô£¬£¬£¬FPGA¼¼Êõ½«³ÉΪ²»¿É»òȱµÄÒ»Ïî¼¼Êõ¡£¡£¡£
¾­ÓÉ´ËÊ£¬£¬£¬Qualcomm(¸ßͨ£©¹«Ë¾ºÍXilinx¹«Ë¾ÓÚ2015Äê11ÔÂÐû²¼Õö¿ªÕ½ÂÔÏàÖú¡£¡£¡£Á½¼Ò¹«Ë¾½«ÕûºÏ¸÷×ÔÉÆÓڵļ¼Êõ£­ÓÃÓڸ߶ËЧÀÍÆ÷µÄARM´¦Öóͷ£Æ÷ºÍFPGA¼¼Êõ£¬£¬£¬ÃæÏòÊý¾ÝÖÐÐÄÊг¡Ìṩ½â¾ö¼Æ»®¡£¡£¡£´Ë´ÎÏàÖúµÄЧ¹û½«º­¸Ç´óÊý¾ÝÆÊÎö¡¢»úеѧϰºÍ´æ´¢µÈÔÆÅÌËã»ù´¡ÉèÊ©ÁìÓò¡£¡£¡£2015Äê11Ô£¬£¬£¬XilinxÐû²¼Á˺ÍIBM¹«Ë¾µÞ½á¶àÄêÕ½ÂÔÁªÃ˹ØÏµµÄÐÂÎÅ¡£¡£¡£Í¨¹ýÔÚIBMµÄPower SystemsÖÐʹÓÃXilinxµÄFPGAÀ´¿ª·¢ÃæÏòÌØ¶¨Ó¦ÓõļÓËÙÆ÷£¬£¬£¬¿ÉÒÔʵÏÖ¾ßÓиßÄÜЧ±ÈµÄÊý¾ÝÖÐÐÄϵͳ£¬£¬£¬´Ó¶ø¸ÄÉÆ»úеѧϰ¡¢ÐéÄâ»¯ÍøÂç¡¢¸ßÐÔÄÜÅÌËã¡¢´óÊý¾ÝÆÊÎöµÈÓ¦ÓõÄÐÔÄÜ¡£¡£¡£¶øÕâһϵÁеÄÕ½ÂÔÏàÖú£¬£¬£¬±»ÒÔΪÊÇΪÁ˶Կ¹Microsoft(΢Èí£©¹«Ë¾ºÍAltera£¨Intel£©ÁìÏÈÒ»²½ÏàÖú¿ª·¢µÄ¼ÓËÙϵͳCatapult¡£¡£¡£

ÁôÏÂ̸ÂÛ

ÄúµÄÓÊÏ䵨µã²»»á±»¹ûÈ»¡£¡£¡£ ±ØÌîÏîÒÑÓà * ±ê×¢

´ó·¢28¡¤(ÖйúÓÎ)¹Ù·½ÍøÕ¾
¡¾ÍøÕ¾µØÍ¼¡¿¡¾sitemap¡¿